Design, Simulation and Validation of Fault Tolerant Averaging Algorithm for Clock Synchronization With Custom Time Triggered Deterministic Protocol

Time triggered communication provides fault tolerance and determinism in a distributed dependable real time systems. These systems crucially depend on fault tolerant clock synchronization. The article presents simulation of fault tolerant averaging algorithm for clock synchronization and it's modification for improved convergence. We present the simulation results of synchronization algorithm to verify fault tolerance and convergence to a single time base. By modification, we show how a two node system can also be synchronized eliminating the criteria of minimum three nodes. This article also reports a custom time triggered protocol named as deterministic fault tolerant communication protocol particularly suitable for mission critical applications or safety-critical control applications such as in automotive “by-wire” and aerospace systems. The article also presents a different approach for membership service which is based on majority voting and can be used in systems based on time triggered architecture.