Design of Thyristor Stack for Compulsator-Based Pulsed Power Supply to EML

This article deals with the design, protection, and testing of a thyristor stack for a compulsator-based pulsed power supply (CPPS) using a commercial thyristor. The non-idealities including the reverse recovery phenomenon, are modeled in Ansys Simplorer and tested with a designed compulsator. The protection circuit and detailed gate drive circuit design are presented. To test the dynamics of mismatch in current sharing, a 10% of string voltage mismatch is created and performance is evaluated. To design the stack, a safety factor of 2 is considered in general otherwise specified. A 10% of derating factor in voltage and current is considered for designing a protection circuit. The performance of the designed stack in terms of di/dt, dv/dt, current, and voltage is well within the limit specified by the thyristor datasheet. To verify the correctness of the designed thyristor stack, a micromodel-based thyristor modeling is implemented, and real-time simulation based on Opal-RT is performed.

I. Introduction

The use of a compulsator to generate a pulsed supply for electromagnetic launch (EML) is becoming particularly widespread. The compulsator-based pulsed power source is generally a multiphase machine [1], [2], [3], [4]. Hence, it necessitates a multiple switch stack that can be sequentially switched into the launcher to customize pulse shape and amplitude. The amplitude and shape of the current pulse define the component requirements for a compulsator-based pulsed power supply (CPPS). The shape of the load current pulse determines the amount of energy provided to the projectile and its exit velocity.