Contents I. Introduction
The Level-1 trigger system of the ATLAS [1] experiment conducted at CERN is a key component for selecting physics-motivated events out of millions of collisions which occur every second. It is a hardware-based system operated in a synchronous mode for selecting interesting events by utilizing the particle signatures left in the spectrometer. In order to profit from the upgrade of the Large Hadron Collider (LHC) planned around 2020 with much higher luminosity than the nominal value, the ATLAS experiment will replace its innermost muon detector station in the forward region, named Small Wheel, with a new subdetector system, named New Small Wheel (NSW). The main aim is to maintain its excellent muon momentum resolution offline and precision online trigger in the high background rate environment. The NSW is composed of two new detector technologies, namely, small-strip Thin Gap Chamber (sTGC) and Micromesh Gaseous detector (Micromegas). The NSW trigger is a complex and highly configurable system, the NSW electronics chain consists of several custom-made application-specific integrated circuits (ASICs) and a number of front-end and back-end boards [2], [3]. The slow-control and configuration of the custom-made ASICs on the front-end board are expected to be performed by the giga-bit transceiver-slow control adapter (GBT-SCA) [4], a radiation-tolerant ASIC developed at CERN. Due to the application of several different configuration interfaces between the ASIC and the GBT-SCA chip, an evaluation board and a test system are developed to examine these interfaces and establish a configuration procedure in the context of the entire NSW electronic chain.
