A 40% PAE Frequency-Reconfigurable CMOS Power Amplifier With Tunable Gate–Drain Neutralization for 28-GHz 5G Radios

In this paper, a high-efficiency frequency-reconfigurable CMOS power amplifier (PA) design technique is presented at 24 and 28 GHz using integrated tunable neutralization and matching networks. To cope with the adverse effects of gate-drain capacitance (C
_gd
) in millimeter-wave (mm-wave) CMOS PAs in deep-submicrometer technologies, we propose a reconfigurable coupling-coefficient-based transformer. This technique provides optimum neutralization of C
_gd
in a common-source configuration, while enabling tunable neutralization in a frequency reconfigurable PA. Furthermore, to reconfigure the PA's input and output matching networks, a low-loss frequency-reconfigurable matching topology using a switched substrate-shield inductor is proposed. The adopted matching network addresses the high loss in a conventional frequency reconfigurable matching approach, while facilitating high efficiency in the proposed PA design. Using the proposed techniques, a class-AB PA is fabricated in a 65-nm CMOS technology. This prototype achieves measured saturated power-added efficiency (PAE
_sat
) of 42.6%, saturated output power (P
_o,sat
) of 14.7 dBm at 24 GHz, and 40.1% PAE
_sat
, and 14.4 dBm P
_o,sat
at 28 GHz while occupying an active area of only 0.11 mm
²
. At 24 and 28 GHz, the PA is tested under 16 and 64-quadrature amplitude modulation (QAM) signals with 250 MHz of channel BW. The PA achieves modulated PAE of 15.2%/14.1%, error vector magnitude of -26.4/-26.6 dB, and adjacent channel leakage ratio of -30/-32 dBc at an average output power of 7.1/7 dBm for a 64-QAM signal with 250-MHz BW at 24 and 28 GHz, respectively. To the best of the author's knowledge, the design presents one of the highest PAEs among mm-wave CMOS PAs reported to date, while it also supports multiband operation.