Front-End Programmable 40 GS/s Monobit ADC in 45 nm SOI Technology

A 40 GS/s monobit analog-to-digital converter (ADC) with programmable RF input conditioning implemented in an RF 45 nm silicon-on-insulator (GF 45RFSOI) technology is presented as a solution toward wide-band blocker sensing for adaptive radio. The direct sampling ADC is able to detect RF signals in a 2–20 GHz bandwidth with at least −71 dB sensitivity and 38.6 dB dynamic range utilizing a programmable attenuation range of 46.5 dB. The monobit ADC core is power efficient with only 112.1 mW of power consumption, with the RF front-end consuming another 60.8 mW of power. The core circuitry has an area of 0.568 mm2 fabricated in the 45RFSOI process and tested using a co-designed evaluation board.