I. Introduction
Spintronics is an emergent technology beyond CMOS which can help reducing the static and dynamic power consumption of CMOS circuits beyond the 90 nm technology node [1]. Magnetic tunnel junctions (MTJ) are key basic elements in spintronics. They essentially consist of three layers (a thin tunnel oxide layer sandwiched between two ferromagnetic (FM) layers) [2]. Due to the tunnel magnetoresistance (TMR) effect, the nanopillar resistance, or , depends on the relative orientation, Parallel (P) or Anti-Parallel (AP), of the magnetization of the two FM layers [3]. Remarkably, in MgO based MTJs, the can reach a quite high value (e.g., >600%) at room temperature, which allows the state of MTJs to be easily detected by CMOS sense amplifiers [4]. It is possible to switch from one configuration to the opposite by using the Spin-Transfer Torque phenomenon (STT) [Fig. 1(a)]. Nowadays, STT-RAM are regarded as one of the most promising candidates for next generation of nonvolatile memories and programmable logic chips thanks to their performances in terms of power consumption, miniaturization and integration with CMOS process [5], [6]. MTJ with perpendicular magnetic anisotropy (PMA) attract even more attention compared to their In-plane magnetized counterparts because of their improved performances in many aspects [7], [8]. STT PMA MTJ can combine good thermal stability, low critical current and high access speed. We presented recently a spice compact model for memory and logic simulation, which integrates the static and dynamic behaviors of STT PMA MTJ [9].
(a) Spin transfer torque switching mechanism: the MTJ state changes from parallel (P) to anti-parallel (AP) under positive electron flow direction . It changes from AP to P under negative electron flow direction . Note that the red arrows represent the electron flow and not the current (b) experimental measurement of STT stochastic switching behaviors, high writing current drives faster speed and higher switching probability.