High Performance (Vth ~ 0 V, SS ~ 69 mV/dec, IOn/IOff ~ 1010) Thin-Film Transistors Using Ultrathin Indium Oxide Channel and SiO2 Passivation

Ultrathin indium oxide (InO
_x
) films (≤5 nm), which are grown by plasma-enhanced (PE) atomic layer deposition (ALD) with (C
₂
H
₅
)
₂
InCH
₃
and O
₂
plasma, are explored as channels of thin-film transistors (TFTs). First, we investigate the effects of channel thickness (
${T}_{\text{ch}}$
), channel length (
${L}_{\text{ch}}$
), and post-annealing conditions on the performance of TFTs with HfO
₂
gate dielectrics, respectively. The results indicate that superior overall performance can be achieved for the device with 2.5 nm
${T}_{\text{ch}}$
,
$2 ~\mu \text{m} {L}_{\text{ch}}$
, and 8.5 nm HfO
₂
gate dielectric after annealing at 325 °C for 180 s in O
₂
. Increasing the post-annealing temperature to 350 °C degrades the TFTs because of crystallization of HfO
₂
and outdiffusion of In element. Furthermore, with a PE chemical vapor-deposited SiO
₂
passivation layer on the back of the channel, the performance of the TFTs is significantly improved after post-annealing, especially at 300 °C for 1 h in air, such as near-zero-threshold voltage, a very small subthreshold slope (SS) of 69 mV/dec, a very high On/Off current ratio of ~10
¹⁰
, and relatively high field effect mobility of 17 cm
²
/
$\text{V}\cdot \text{s}$
. Finally, the positive and negative gate bias stress (NGBS) measurements of the devices also indicate that the SiO
₂
passivation layer can improve remarkably the NGBS stability. Thus, such a kind of device could be very promising for low-voltage and low-power applications.