A Method to Isolate Intrinsic HCD and NBTI Contributions Under Self Heating During Varying VG/VD Stress in GAA Nanosheet PFETs

Gate-all-around stacked nano-sheet (GAA-SNS) p-channel field effect transistors (FETs) having varying sheet widths are utilized for ultrafast measurements (
$10 ~\mu \text{s}$
delay) of negative bias temperature instability (NBTI) and hot carrier degradation (HCD). The BTI analysis tool (BAT) framework is used to analyze the pure NBTI data at multiple
${V}_{G}$
and
${T}$
. BAT is suitably modified to estimate the NBTI contribution in the presence of self-heating (SH) effect at multiple
${V}_{G}$
and
${V}_{D}$
under HCD stress. The pure HCD kinetics is estimated using both empirical and physical models; a vertical field and
${T}$
enhanced dominant energy concept is used for the
${V}_{G}, {V}_{D}$
, and
${T}$
dependence. Projected degradation at end-of-life (EOL) and under multiple
${V}_{G} / {V}_{D}$
conditions is estimated.