Temperature-Dependent Dynamic Performance of p-GaN Gate HEMT on Si

Temperature-dependent dc and dynamic characteristics of p-GaN gate HEMT were thoroughly investigated from 300 to 140 K. At low temperature, in addition to barely shifted threshold voltage, substantial improvement in drain current was observed. At 300 K both positive and negative gate bias stressing were applied to the device in order to form a complete mapping of threshold voltage instability of p-GaN gate HEMT. Three mechanisms, namely hole trap emission, carrier out-spilling, and hole accumulation have been employed to elucidate the trends of threshold voltage shift at room temperature. Temperature-dependent dynamic performances, including threshold voltage instability and drain current degradation, were investigated. Via drain current transient spectroscopy, activation energy for hole emission and trapping process were extracted as 132 and 70 meV, respectively. Detailed pulsed output characteristics at various quiescent biases were explored. At 300 K, gate quiescent bias played a dominant role in determining current collapse compared with drain quiescent bias. Moreover, current collapse caused by gate pulse stressing was much mitigated with decrease of temperature. The detailed temperature-reliant dynamic performance provides valuable information for justifying feasibility of p-GaN gate HEMT for low-temperature applications and further device optimizations.