Field Plate-Adaptive Doping: A Novel Surface Electric Field Optimization Technique for SOI LDMOS With Gate Field Plate

The tradeoff between breakdown voltage (BV) and specific ON-resistance (
${R}_{{\mathrm{\scriptscriptstyle ON},\text {sp}}}$
) has always been the most crucial designing indicator to power devices. In this article, based on the effective concentration profile (ECP) concept, a novel field plate-adaptive doping (FAD) technique is proposed. Therefore, the benefits of the field plate (FP) structure and variation in lateral doping (VLD) technique are obtained simultaneously, while avoiding the inherent disadvantages of VLD and FP techniques. The new devices feature the gate FPs covering the part drift region with the FAD doping profile. The analytical model is therefore proposed to theoretically explore the breakdown mechanism. The good agreement between modeled and simulated results verifies the effectiveness of the FAD technique. The FAD achieves the advantages of low on-resistance and high BV by allowing a higher drift region doping concentration and suppressing the peak field at the FP side. Thus, compared with the FP and VLD, a better tradeoff between BV and
${R}_{{\mathrm{\scriptscriptstyle ON},\text {sp}}}$
can be obtained in the FAD lateral double-diffused metal–oxide–semiconductor (LDMOS).