A Review of Hot Carrier Degradation in n-Channel MOSFETs—Part I: Physical Mechanism

Transistor parametric drift due to conductionmode hot carrier degradation (HCD) in n-MOSFETs is reviewed, for longand short-channel length (LCH) devices having different source/drain (S/D) junction structures. The HCD magnitude and time kinetics shape are discussed for stress under different gate (VG) and drain (VD) biases with varying VG/VD ratio, and without and with substrate bias (VB). Post-dc stress kinetics is discussed. The published data are qualitatively analyzed to identify the roles of different underlying physical mechanisms. In part II of this article, impacts of technology scaling and stress temperature (T) and comparison of dc and ac stress are discussed.