I. Introduction
For practical application of resistive random access memory (RRAM), some essential requirements are fast switching speed (<100 ns) at higher bias, immunity to read-disturb (~109 reads at 100 ns, i.e., 100 s) at read bias, and long retention (~10 years) at zero bias [1]. This is the so-called voltage–time dilemma [1], i.e., fast switching at higher bias (SET/RESET) as well as slow switching at lower bias (read and retention) in the same RRAM device. To fulfill this requirement, there must be a switching mechanism having very high nonlinearity in switching timescale versus applied bias [1]–[3]. PCMO-based RRAM is bipolar [4] which shows area scaling of current [5]. It is of great interest because of its excellent reliability [6], lower variability [6], [7], forming less operation [8], [9], and selector-less operation which is useful for 3-D packaging [10]. PCMO is a p-type semiconductor. The bulk current conduction in PCMO-based RRAM occurs by trap-controlled space charge limited current [11] according to (where is the trap density) [12] for both low-resistance state (LRS) and high-resistance state (HRS) [13], [14]. The chemical identity of hole trap is positively charged oxygen vacancy () [9], [15]. Ionic transport due to positive (negative) polarity on W electrode extracts oxygen ions (traps) from PCMO to W electrode to increase (reduce) trap density in PCMO [4], [15]. Thus, increase (decrease) in trap density during RESET (SET) reduces (increases) the current to modulate the resistance. The ionic velocity depends upon electric field and temperature as given by Mott–Gurney equation [16]–[20]. The temperature sensitivity was first observed by integrating a Ge2Sb2Te5 layer acting as a thermoelectric heater and thermal barrier, at Ti/PCMO interface [15]. Such an xtrinsic heater thermally accelerates ionic transport by enhancing the mobility of oxygen ions. We have proposed intrinsic Joule heating (self-heating) due to current conduction in the PCMO layer [14]. We demonstrated that TCAD modeling with self-heating is able to match the experimental dc – characteristics in a range of temperature to establish that the nonlinearity is related to thermal runaway [14]. Later, we studied the fast pulse train-based transient measurements during SET and RESET [21]. During the pulse, the current transient showed a slow increase in current (–100 ns), which was related to heating timescale. The experiment transient was reproduced by transient TCAD simulation including self-heating. Similarly, interrupting the pulse by interlaying the gaps of various durations showed a thermal cooling timescale of 30 ns, which was consistent with thermal modeling-based expectations. We have experimentally demonstrated that the self-heating remains effective at lower currents in scaled devices and the extent of self-heating can be engineered by: 1) scaling [21] and 2) device thermal resistance modification to affect SET and RESET in dc sweeps [22]. Although dc [14], [22] and fast () SET/RESET was studied [21], the success of the memory depends on simultaneous achievement of fast SET/RESET at high bias as well as slow read-disturb at low bias. Although transient study (including temperature also) has been done for PCMO [23], [24] as well as other materials system [25]–[29] but this voltage–time dilemma, which is characterized by the detailed nonlinear response of switching timescale with bias, has not been demonstrated with ambient temperature for area scalable manganite-based RRAM.