Comprehensive Simulation Study of Direct Source-to-Drain Tunneling in Ultra-Scaled Si, Ge, and III-V DG-FETs

As the scaling of transistors approaches the 7-/5-nm technology nodes, direct source-to-drain tunneling (SDT) is becoming increasingly important with the shrinking gate lengths. In this paper, we present a comprehensive simulation study on the effects of SDT in ultrascaled FETs with various channel materials (Si, Ge, SiGe, InGaAs, and so on), surface/channel orientation configurations, gate lengths, body thicknesses, doping concentrations, stress levels, and temperatures. The nonequilibrium Green's function formalism with the atomistic tight-binding basis is used to accurately model both the quantum-mechanical tunneling and the bandstructure effects. To quantify the strength of SDT, we propose a current ratio (β), which essentially illustrates the difference between a full quantum transport model and a semiclassical model for calculating the FET OFF-current. The results clearly show that SDT strongly depends on orientations and stress levels in the FET channel, and for materials with a small transport effective-mass (e.g., Ge and InAs), SDT dominates the total OFF-current, making it difficult to achieve a low OFF-current target at a scaled gate length. In addition, it is found that the temperature dependence of the FET OFF-current decreases with the strength of SDT, which may have an implication on the technology definition and device targeting for the 7-/5-nm nodes.