An Analytical BTBT Current Model of Symmetric/Asymmetric 4T Tunnel Double Gate FETs With Ambipolar Characteristic

This paper presents a systematic analytical model development for a sub-45-nm gate length double gate tunnel FET (DG TFET) and assessment of the tunneling current based on classical model under asymmetric circumstances with the ambipolar characteristic. Performance analysis of the tunneling current for a sub-45-nm gate length TFET is performed using Kane's model by considering high doping in the source and drain regions keeping the channel region low doped. The model explains the variation of tunneling current with the change in oxide thickness under symmetric front and back gate voltages with 5 eV metal work function. The variation in tunnel current is also analyzed for the change in channel thickness under symmetric front and back gate voltages for symmetric oxide thickness. The increase in tunneling current for channel thickness scaling under asymmetric operation of the DG TFET is also efficiently captured by the developed model. The model is compared and verified with Sentaurus TCAD for all bias conditions and good agreement has been achieved.