Plasma Charging Behavior of p-MOSFETs With Floating Bond Pads and Its Application to Charging-Safe Bond Pad Design

Plasma charging behavior of p-MOSFETs with floating bond pads was studied with experiments and simulations. Experiments show that gate oxide damage can occur in these transistors with a small n-Well during backend integrated-circuit manufacturing process. Simulations confirm that the damage was caused by both plasma illumination-induced photoconduction in n-well-to-substrate junction and the large gate bond pad. Such damage can be minimized if transistor terminal impedance-lowering technique is applied, which substantially reduces potential drops across gate oxide, thus relieving the stress there. The study reveals that the terminal impedance-lowering technique decouples the local gate-charging event from the source, drain and n-well charging events, rendering gate charging to be immune from the plasma illumination induced photoconduction effect in n-well junction. This study leads to a charging-safe bond pad design with inserted M
₁
pads at transistor terminals without protection device(s). The design can be applied to both nonreference p- and n-MOSFET test structures for noncharging-monitoring applications. The learning here implies that floating bond-pad n-MOSFETs will likely suffer higher stress in their gate oxides than floating bond-pad p-MOSFETs during charging events of same plasma conditions.