I. Introduction
With the scaling of the CMOS transistors to decananometer dimensions atomic scale effects start to play increasingly important role in their behavior [1]. It is well documented in both numerical simulations [2] and experimental studies [3]–[5] that the discreteness of charge and granularity of matter introduces unavoidable, purely statistical variations in the transistor characteristics, which progressively increase with the reduction of the device dimensions [6], [7]. Among the major sources of statistical variability are: 1) the discreteness of dopants [2] and trapped charges at the interface and in the oxide [8]; 2) the granularity of the gate oxide [9] and the gate material [7]–[10]; and 3) the line edge roughness resulting from the molecular structure of the photoresist and the corpuscular nature of irradiation [11]. Increasing variability in bulk CMOS associated mainly with random dopant fluctuations has mediated the introduction of revolutionary new transistor architectures that tolerate low-channel doping, including FinFETs [12], [13] and fully depleted Silicon on Insulator transistors [14].