A Novel Technique for Probing the Vertical Component of FinFET Source Resistance

We propose and demonstrate, with hardware, the first experimental technique to measure a vertical component of FinFET source resistance. Forward bias is applied to the well-to-source p-n junction, and the forward voltage at constant current density,
${V}_{{\text {fb}}}$
, is measured as a function of source-current,
${I}_{\text {ds}}$
. The source-current,
${I}_{\text {ds}}$
, is varied by variation of
${V}_{\text {gs}}$
, and an effective vertical resistance is calculated,
${R}_{\text {ve}} =$

dV
_fb
/
dI
_ds
. Significant self-heating effects of the p-n junction are observed, and we demonstrate a technique to correct
${V}_{\text {fb}}$
for the local rise in temperature. We find that our technique gives well-behaved results for vertical source resistance. Quantitative
${R}_{\text {ve}}$
values are found to be consistent with technology characterization of (linear region) total device resistance.