PCM-Based Analog Compute-In-Memory: Impact of Device Non-Idealities on Inference Accuracy

The impact of phase change memory (PCM) device non-idealities on the deep neural network (DNN) inference accuracy is systematically investigated. Based on the experimental PCM data, statistical models of device non-idealities were extracted and incorporated into our PyTorch-based simulation framework for evaluations on the CIFAR-10 dataset. Our specific results include: 1) nonlinear
${I}$
–
${V}$
could incur a significant accuracy degradation, but it can be eliminated depending on how the input activations are encoded (e.g., no degradation with pulse-encoding schemes); 2) resistance variation and read noise induce a relatively mild accuracy degradation (< 1% with experimentally fit model), which can be further mitigated through variation-aware training (VAT); 3) maximizing accuracy over a given operating temperature range is attained through a “temperature-specific weight remapping” method developed in this work, accuracy variance of < 3% is demonstrated over a temperature range of
${T} \pm 15 ^{\circ }\text{C}$
; and 4) resistance drift leads to a significant accuracy degradation over time and is the most challenging non-ideality to address by algorithmic means alone (drift coefficient < 0.015 is needed to achieve < 3% degradation in ten years). A “weight transfusion” (WT) method has been proposed to effectively recover the inference accuracy by incrementally activating additional pre-trained neurons over time. The main overhead is the additional area to store pre-trained weights beforehand, which is likely affordable given the high density of MLC PCM.