Epitaxial Al-InAs Heterostructures as Platform for Josephson Junction Field-Effect Transistor Logic Devices

We fabricate Josephson junction field-effect transistors (JJ-FETs) using InAs quantum well heterostructure as the channel, epitaxial Al as superconducting electrodes, and scaled-down Al
₂
O
₃
gate dielectrics. A systematic investigation of the gate voltage (V
_G
) dependence of the critical current, normal state conductance, and characteristic voltage of the JJ-FETs coupled with capacitance measurements reveals different V
_G
regimes in the proximity effect characterization of JJ-FETs. Self-consistent Poisson-Schrödinger simulations allow us to associate these V
_G
regimes with the carriers populating one or more subbands at different vertical locations in the heterostructure. We also discuss the importance of oxide/channel interface quality and its impact on the practical implementation of JJ-FET Boolean logic gates with signal restoration.