Influences of Source/Drain Extension Region on Thermal Behavior of Stacked Nanosheet FET

A well-calibrated numerical-simulation-based study reveals that an elongated extension region can be a notable approach for the self-heating mitigation of nanosheet FETs. It is observed that a longer extension length (
${L}_{\text {EXT}}$
= 8 nm) reduces the ON current; however, it holds a smaller penalty in
${I}_{\text {ON}}$
degradation (~10%) due to the self-heating effect (SHE). When the extension region is increased from 2 to 8 nm, a reduction of
$16\times $
in
${I}_{\text {OFF}}$
is observed along with a reduction of ~9 mV/dec in the subthreshold swing. On the contrary, a change in ~15 mV in
${V}_{T}$
is observed when
${L}_{\text {EXT}}$
is increased from 2 to 8 nm. Considering lattice heat due to SHE, intrinsic delay, unity-gain bandwidth, and the above-mentioned characteristic, the optimum
${L}_{\text {EXT}}$
would be 5–6 nm. The longer extension lengths (2–8-nm increase) provide a lesser transconductance (
${g}_{m}$
) degradation (~15%) due to SHE. It is observed that intrinsic capacitance
${C}_{\text {gg}}$
reduces with an increment in
${L}_{\text {EXT}}$
(2–8 nm), which eventually reduces the propagation delay (~20%) with an improvement in noise margin too. It is worth noting that for a common source amplifier, a longer extension region of 8 nm will also provide
$\sim 1.87\times $
more voltage gain when compared with
${L}_{\text {EXT}}$
of 2 nm, which increases to
$\sim 1.97\times $
in self-heating condition due to a smaller degradation “
$\Delta {G}$
” (from ~12.4% to ~6.6%) in gain with longer extension length.