Pd/Ge/Ti/Pt/Au Metal Stack on Semi-Insulating Gallium Arsenide: Ohmic Contact and Temperature Dependence

Semi-insulating gallium arsenide (GaAs) has significant advantages in high-power electronic devices. However, its low carrier concentration and high bulk resistivity make it difficult to achieve good ohmic contact characteristics. Currently, the Au/Ge/Ni ohmic contact electrode is commonly used on semi-insulating GaAs. However, this approach has problems related to the morphology and metallurgical changes of their interfaces leading to poor thermal stability of devices. Therefore, this article proposes Pd/Ge/Ti/Pt/Au multilayer metal to realize ohmic contact on semi-insulating GaAs substrate and designs the functional gradient Pd/Ge/Ti/Pt/Au layers with different thicknesses on semi-insulating GaAs. In the
$\text{N}_{{2}}$
atmosphere, the effects of annealing temperature, duration, and Pd/Ge thickness are studied. The formation mechanism of ohmic contact and the relationship between specific contact resistivity and temperature are analyzed using the thermoelectric field emission model (TFE). A low specific contact resistivity of
$1.34~\Omega \cdot $
cm2 has been obtained at 550 °C for 180 s. The excellent ohmic contact characteristics of the semi-insulating GaAs-based high-power semiconductor optoelectronic devices could be applied in the future.