Aging Analysis of CMOS Based Synaptic Circuits

Several analog VLSI circuits modeled synaptic functionality within the context of hardware implementations of pulse-based neural networks. However, with the ageing of these circuits, reliability issues such as Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) cause degradation in the overall circuit performance. In this work, we have implemented various synaptic circuits in the biological range [1] and analyzed the impact of NBTI and HCI on circuit parameters, like maximum synaptic current and average power consumed.