NBTI Resilient Dual Mode Noise Immune Inverting Schmitt Trigger Circuit

The proposed DM-IST circuit is configured with a single PMOS in pull-up and five NMOS in pull-down networks to reduce the effect of negative bias temperature instability is presented. The $\mathrm{V}_{\text {th }}$ shift for the DM-IST is $1.43 \times$ of conventional Schmitt trigger for a stress time of ten years. DM-IST is more noise immune because it has $1.14 \times$ improved HW than conventional Schmitt trigger. All simulation is done by Cadence Virtuoso Tool using 40nm UMC technology.