Design of low power LSTM neural network accelerator based on FPGA

The continuous progress of artificial intelligence has led to the great success of LSTM neural networks in various fields, and with the changing application scenarios, the design of hardware gas pedals for LSTM neural networks has become a hot topic of discussion today. Compared with CPUs, GPUs, and ASICs, FPGAs have the unique advantages of low resource consumption, low power consumption, high energy efficiency, and high flexibility in accelerating deep learning, making them the preferred platform for hardware implementation of neural networks. Improving LSTM accuracy comes at the cost of a larger network model, and a larger model represents a more significant power consumption. How to guarantee the operation of neural network gas pedals under resource constraints has become a considerable research hotspot. This paper proposes a low-power FPGA-based LSTM neural network gas pedal through parameter quantization, weight pruning combination, and other methods; after the training of the MINST dataset, this hardware gas pedal can realize the inference process of the neural network while having 80% accuracy, the web-based on Xilinx Virtex VC-707 FPGA board to complete the design and testing. Experimental results show that the proposed method consumes only 0.986W, 2-40 times less power than similar designs.