FPGA-Accelerated Password Cracking

Passwords are a common way of securing systems and applications from unauthorized access. However, passwords can be vulnerable to attackers who try to crack them by using random guesses, common patterns (e.g., password topologies), dictionary words, or leaked passwords. In this paper, we propose a hardware-accelerated password cracking method that leverages field-programmable gate array (FPGA) technology to recover passwords hashed with the sha512crypt algorithm. This algorithm is widely used on Linux systems. Our approach focuses on fast development to simulate a casual attacker who wants to boost their password cracking performance by using the speed and parallelism of FPGAs, which can outperform traditional CPUs and GPUs. Using C++ high-level language (a technique called high-level synthesis), we created a hardware device (i.e., a core) that runs the sha512crypt algorithm on the Zynq Z-7020 CPU-FPGA hybrid chip. We then tested the password cracking speed of our core (passwords/sec) and compared it to the AMD Ryzen 9 and Apple M1 Max CPUs. Based on the results of one core and two parallel sha512crypt cores on our chip, the maximum that could fit, we estimated that an FPGA chip with more than 8 sha512crypt cores and the same parameters as our chip could crack 10-character passwords at 360 passwords/sec, which is faster than a single-threaded sha512crypt on either CPU. We also projected that with 15 cores, we could achieve a speed of 675 passwords/sec, which is twice as fast as either of the CPUs. We think this work is a useful addition to the research on cybersecurity applications of FPGAs, as few works have tried to break sha512crypt on the FPGA. In the future, we will implement our design on modern FPGA chips that can accommodate more than 10 cores, optimize our designs and evaluation methodology, and perform a more extensive evaluation.