Design of Symmetrical Multilevel Inverter Topology With Reduced Number of Switches

Multilevel inverters are useful for obtaining a high-quality AC output with reduced Total Harmonic Distortion (THD) values. It is evident that the increased inverter output levels demand the high number of switching devices and multiple DC sources, leading to an escalation in the size and complexity of the circuit. This paper proposes a novel circuit topology for Symmetrical Multilevel Inverters (SMIs) to address the issues associated with increased number of switching devices like switching losses, cost, circuit and control complexities. In this paper, it is proposed to combine a diode-clamped inverter with an H-bridge inverter. This combination reduces the requirement of switching devices and the connected issues such as the losses and inverter complexities.