Harmonic Minimization in Switched-Capacitor Multilevel Inverter Using Improved Grey Wolf Optimization

This research proposes an innovative 13-level switched capacitor multilevel inverter (SC-MLI) with built-in output voltage boosting capability. To obtain a 13-level boosted voltage output, the proposed SC-MLI employs 12 switches and 2 diodes connected with a single DC power source. The switching sequences in the proposed MLI are generated such that the capacitors are self-balanced and optimum voltage levels are obtained at the output. The 13-level SC-MLI proposed in this paper uses a selective harmonic elimination pulse width modulation (SHE-PWM) technique, based improved grey wolf optimization (IGWO) to determine the switching angles for filtering out the lower order harmonics, such as 5th, 7th, etc from the output voltage. The switching angles for the proposed topology have been calculated using IGWO algorithm. The proposed SC-MLI has been simulated using MATLAB/Simulink and experimentally verified through a 400W prototype using NEXYS 4 DDR FPGA. The efficiency of the proposed SC-MLI is found to be 95% and total harmonics distortion (THD) is within the limits. Further, a comparison is also made between the proposed SC-MLI and the other published SC-MLIs, and it is found that the proposed one demonstrates superior performance in terms of gain, total standing voltage (TSV), and number of active and passive components.

I. Introduction

The power system industries have recently shown a lot of interest in multilevel inverters (MLIs), especially in medium to high-power applications. They have several benefits, like producing output voltage with reduced voltage stress and minimal distortion. MLI topologies such as cascaded H-bridge MLI (CHB-MLI), and neutral-point clamped MLI (NPC-MLI), flying capacitor MLI (FC-MLI) topologies offer disadvantages, such as need for a substantial quantity of both active and passive components, complex control algorithms, and the issue of capacitor voltage balancing [1]. To tackle the limitations of conventional MLIs, switched-capacitor MLIs (SC-MLIs) with inherent self-balancing feature emerges as the optimal solution, which can incorporate the required voltage levels with fewer components and simplified control complexity [2]. The active and passive components, along with total standing voltage (TSV), are high in the SC-MLI configurations reported in [3]–[6], and hence they require higher rated components to obtain higher voltage levels. The MLI discussed in [8] produces 13-levels of voltage using 14 switches, two self-balancing capacitors, and two unequal input DC voltage sources. Although, more capacitors and power semiconductor switches are used in [9], [10]; some of these components endure voltage stresses equivalent to boosting factor of inverter, rendering them unfit for use in higher voltage applications. In order to overcome these disadvantages, a 13-level SC-MLI with fewer power switches and higher voltage boost factor has been proposed in [11]. In this topology, the PIV across the switches is restricted thrice by the DC input voltage.