The Development of Successive Approximation Register for SAR ADC

This paper presents a study about successive approximation registers. The study considers and realizes the circuits of fifteen-bit registers and their topologies. In addition, the triggers have been compared to select the most favorable one to be used. The registers are realized based on 180 nm technology, with a supply voltage of 1.8 V. For each of the registers, the influence of technological parameters, parasitic crystal parameters, as well as the evaluation of power consumption and maximum frequency of operation have been verified.