Time domain enhancement of tab-routed microstrip line with EMC validation for DDR4 memory design

One of the key challenge routings for command/address and chips select lines of DDR4 interface as microstrip line on Form factor board like SBC (Single board computer) is likely possible due to its lossy behavior over crosstalk and emission behavior. In this paper, tab routing topology is applied to conventional microstrip design. Time domain behavior like eye height (EH) and eye width (EW) and radiated emission likely near-field is investigated. There is 1.22% and 23.89% improvement on EW and EH respectively, achieved over conventional design at 3200 Mbps speed. At the same time, electric field confinement is observed which reduces emission in terms of electric field intensity over a conventional design..