Design of Cryogenic Circulator in 65-nm CMOS Technology Using All-Pass Filter Architecture

Quantum computers can reduce the computation time of many simple tasks that a classical computer cannot perform quickly. As the number of qubits in a quantum computer increases, handling qubit readout at room temperature becomes difficult. To manage the qubit readout efficiently for a quantum computer with thousands of qubits, qubit readout circuitry operating at cryogenic temperature is desired. Circulator is an important component of the qubit readout circuit, which is conventionally a bulky element. Various architectures have been proposed for integrated CMOS circulators. All-pass filter architecture is studied and implemented in 65nm CMOS technology. Non-reciprocal characteristics are achieved over a large bandwidth. After Post-Layout simulation, an insertion loss of 3.28 dB is attained, whereas isolation of more than 16 dB is reported over a large bandwidth. IIP3 greater than 15 dBm is obtained in all directions of the circulator, keeping it away from nonlinear region of operation for quantum applications.