RF Modelling of for Through SiC Vias and Fabrication of SiC based Interposer

In this paper we will analyze the parameter space given by an innovative manufacturing technology of Through SiC Vias (TSiCV) with respect to its impact on the RF signal propagation in future highly integrated packaging concepts. The research on the development of SiC interposer technology with TSiCVs is described and the study demonstrates a SiC interposer using Flip-Chip assembled chips with different thicknesses. This paper also highlights the differences between the via formation between silicon and silicon carbide. In addition to the etching of SiC the impact of the SiO
2
isolation studied.Finally, the impact of the realized via geometries on the RF signal propagation in a signal-ground via pair are presented. The investigation includes the equivalent circuit model as well as numerical simulations of insertion loss, return loss and propagation speed.