Research on ECC Algorithm FPGA Acceleration Circuit for High Reliable AIoT System

With the fast development of AIoT systems, there are more and more memory storage requirement in system. It is quite urgent requirements to improve and integrate the memory security characteristic in AIoT system. As the basic algorithm to protect AIoT memory chip working in correct status, Error Correction Code (ECC) is used to calculate whether the data in memory circuit is correct or not. This article studies an ECC acceleration hardware circuit based on FPGA chip, which realizes the functions of detecting one bit or two bit error, and correcting one bit error. It not only improves the stability of data storage in the AIoT system, but also effectively eliminates errors caused by hardware failures. The ECC acceleration circuit can efficiently help to keep stable, safer and reliable AIoT system functions.