Double-OTA External Capless Low-power LDO Regulator with Enhanced PSR and Transient Response

Low drop-out (LDO) regulators play a vital role in power management devices, serving as a critical component. This research paper introduces an innovative LDO regulator that offers enhanced load transient response and power supply rejection (PSR). In the proposed LDO, by using two OTAs as error amplifiers in a complementary scheme and transferring effectively the over/undershoot of the output voltage to their Tail transistors, the bias current of each OTA is modulated dynamically to improve the slew rate and load transient response. Besides, creating a zero by a low pass filter in the voltage supply terminal of the first error amplifier is caused to reduce the effect of the pole which is located in the gate of the pass transistor, which results in the improvement of the output PSR. These zeroes made the proposed LDO stable without any external capacitor with a phase margin of 60 degrees. The proposed design with an input voltage of 1.8 to 2.4 volts has a PSR of −69 dB at a 1 kHz frequency. In addition, the LDO quiescent current is as low as 600 nA, while delivers maximum current of 50 mA to the load.