A Novel Algorithm for High-Concurrency Digital Sampling Conversion Towards 6G Networks

The popularity of software defined radio (SDR) compels the implementation of intricate digital signal processing algorithms on field-programmable gate arrays (FPGA). Traditional digital sampling conversion is a fundamental technique in SDR, frequently employed for processing digital intermediate frequency (IF) signals. With the advent and advancement of 6G networks, higher demands have been placed on signal bandwidth. The existing digital sampling conversion algorithms are incapable of meeting the practical requirements of signals with high bandwidth. This paper presents a digital sampling conversion algorithm tailored to the vision of 6G networks, and a comprehensive solution for high-concurrency digital sampling conversion is proposed. Through the implementation of a cascaded filter structure and its validation via mathematical modeling, it becomes evident that substantial reductions in system power consumption can be attained. Experimental results demonstrate that the proposed optimized algorithm in this paper holds significant application value, is easily implementable, and fulfills the requirements of high bandwidth communication in 6G scenarios.