Design of Cyclic Redundancy Check (CRC) Code Generator Circuit in Quantum Dot Cellular Automata (QCA) for Communication

QCA is considered as the replacement of CMOS technology for its attractive features that overcome the limitation of CMOS. Many designs of error detector circuits like parity checkers were proposed in QCA platform; but CRC circuit design in QCA platform is very limited. This paper presents Cyclic Redundancy Check (CRC) Code Generator circuit in QCA platform as an initiative. It shows an improvement where the cell counts, area, and no. of gates of the proposed circuit are reduced more than 5 times, 8 times, 50% respectively than the existing counterparts. It makes the circuit more efficient than the existing works. The circuit is designed and simulated in QCADesigner software.