A 23-41GHz Ultra-Wideband Linear CMOS Power Amplifier for 5G Communication

This paper presents a 23-41 GHz ultra-wideband linear power amplifier fabricated on 65-nm CMOS process. In order to achieve high gain and high output power within the band, the design method of input and interstage transformer is analyzed theoretically. Moreover, cold-FET interstage matching network is used in conventional differential common source amplifier with neutralizing capacitance to improve the linearity. By designing matching networks, this power amplifier achieves 19.7dB peak gain and 14.8 peak saturated output power with in-band gain ripple less than 1.5dB. Broadband output power and efficiency performance was achieved with OP
1dB
⩾ 11.4 dBm, PAE
1dB
⩾ 14%, P
sat
⩾ 13.8 dBm, and PAE
MAX
⩾ 24% respectively in 23-41 GHz.