A Wideband Low-Noise Amplifier Using High-Pass Filter Structure with Diode Linearizer

In this study, we designed a CMOS wideband low-noise amplifier (LNA) operating at 24.0-41.0 GHz. The optimization techniques of the first-stage transistor size tuning and high-pass filter (HPF) structure were used in consideration of the noise characteristics in the high frequency. Finally, we used the diode linearizer technique in the third stage to improve the linearity of wideband LNA, considering that bandwidth and linearity are in a trade-off relationship. To verify the feasibility of the proposed design techniques, we designed a three-stage wideband LNA using a 65-nm RFCMOS process. The measured 3-dB bandwidth and input P1dB were higher than 22.3 GHz and −8.92 dBm, respectively, in the operating frequency range of 24.0-41.0 GHz.