Designing of Parameter of Exact and Inexact Compressor Based Low Power Multiplier

Multiplication is the basic fundamental computational block of every computer system and has vast applications in today's era. To design a low power approximate low power multiplier we used compressor. Proposed approximate compressor based Multipliers have been designed for Error forbearing Image analysis applications. In this paper, approximate compressor is proposed for error-tolerant image processing applications. An Inexact compressor based Multiplier introduced to get improved Results as compared with the Literature. Validation and Optimization of Designed Multipliers with the 4 to 2 compressor designs and ECM (Error Correcting Module) has been validated and optimized for Power, area and delay. A new Methodology and algorithm has been applied to compressor based 8 bit multiplier and for Image application