I. Introduction
Switching waveform calculation is a critical part of the design tool, which can determine the estimated overvoltage and switching loss, and influence the semiconductor devices selection and the thermal system design [1] . To perform the switching waveform calculation, the parasitic loop inductance and switching node capacitance are needed using the advanced switching models [2] – [3] . However, during the design stage, accurately obtaining parasitic inductance becomes challenging without the layout [4] . Thus, an automatic layout tool is significant in providing accurate parasitic values for the switching waveform calculation and converter design. Additionally, the visualization of the layout benefits the users’ understanding of the design.