High-gain DC-DC converter with zero input ripple current : Design and Analysis*

In this paper, a non-isolated high-gain dc-dc converter that utilizes switched-capacitor and switched-inductor (SC-SL) network is proposed and thoroughly analyzed. The proposed topology features a single switch and less number of passive elements as compared to recently emerged high-gain converters. The mathematical analysis of the proposed converter is carried out to find the converter voltage gain and stresses on power devices.The converter achieves a gain of nine times at 50% duty cycle with comparatively less voltage stress on power devices. Additionally, the converter encompasses the current mirror ripple cancellation circuit (CMRCC) to eliminate input current ripples. The converter is modelled and verified in continuous conduction mode(CCM) using MATLAB/SIMULINK. The obtained findings exhibit that the input current ripples are effectively eliminated by the CMRCC implementation.