Optimization of Turn-on Loss Reduction and Analytical Model of SiSiC Hybrid Switch

A silicon/silicon carbide (Si/SiC) hybrid switch (HyS), comprised of a high-current Si insulated gate bipolar transistor and a low-current SiC metal oxide semiconductor field effect transistors, can offer high performance and low cost simultaneously. As the turn-on loss account for a large portion of the switching loss, the analysis of turn-on process and the reduction of its loss is important for performance improvement. This article studies how gate resistances and turn-on signal delay regulate the dynamic behavior of the HyS during off-to-on. It is observed that the turn-on switching loss can be reduced through modulation of gate signal sequence. With an optimized gate signal sequence for Si IGBT and SiC MOSFET, the di/dt for the HyS is increased and the turn-on loss is substantially reduced. The impact of gate driver resistances and signal sequence on HyS turn-on loss is investigated. Furthermore, an analytical model of the HyS turn-on process is also proposed to predict the optimal signal sequence for the HyS.