The Impact of Unbalanced Condition on Short-Circuit Performance of Multi-Chip Parallel SiC MOSFETs

In the parallel SiC MOSFETs circuit, ignoring the influence of the different parameters of the chip itself, only the parasitic inductance and the initial case temperature of the SiC MOSFET are different in each branch of the parallel circuit. The difference between these two parameters causes the relationship between the total short-circuit protection threshold current of the parallel SiC MOSFET and the threshold current of each branch in the parallel circuit. Through the two SiC MOSFETs in parallel short-circuit experiments, it is found that the parasitic inductance differs by 25% and the initial case temperature differs by 400%. The peak current value of the branch with the smallest parasitic inductance and case temperature is 1.04 times than the other. The total short-circuit protection threshold current is set according to this peak current, and the total threshold current is 1.02 times than the actual threshold current. In practice, the parasitic inductance and initial case temperature of parallel SiC MOSFETs will not obviously differ. It implies that the total short-circuit protection threshold current in parallel SiC MOSFETs can be determined by multiplying the short-circuit threshold current on any of the parallel circuits in the branch by the total number of branches.