Modeling and Validation of an Isolated NMOS Transistor in a 0.25 μm SiGe-C BiCMOS Process

This study presents the generation of a scalable model based on measurement-aided numerical calculations for INMOS (isolated NMOS) with both PSP and BSIM3 parameter set. Various INMOS structures with several different sizes are fabricated in an in-house developed $0.25 \mu \mathrm{m}$ BiCMOS process. The validity of the constructed model is verified with the measurement results. This work explains main steps and details of MOS transistor modeling. An RF SPDT switch is also designed with using both PSP and BSIM3 based model. The designed RF SPDT switch performance which is based on these two models is given. Both PSP and BSIM3 model performance are compared in the designed RF SPDT switch simulation results.