Design of 340-GHz On-Chip Power Combiners for InP HBT PAs

This paper presents the design of 340-GHz on-chip power combiners for InP heterojunction bipolar transistor (HBT) power amplifiers (PAs). A two-way Wilkinson combiner is firstly designed, and the measured insertion loss (IL) of back-to-back structure is 2.1 dB at 340 GHz. Then, by cascading two-way T- junction combiners or Wilkinson combiners, three kinds of four- way power combiners are proposed. At 340 GHz, the measured ILs of back-to-back structures of four-way T-junction combiner, four-way Wilkinson combiner and four-way hybrid structure combiner are 1.6 dB, 3.9 dB and 2.3 dB, respectively. It is the first time to demonstrate on-chip power combiners for InP HBT PAs at 340 GHz.