Results on the Empirical Design of a Residual Binary Multilayer Perceptron Architecture

Binary neural networks have emerged as an efficient solution for resource-constrained devices due to their reduced computational, memory, and storage requirements. However, binary neural networks often suffer from decreased accuracy compared to floating-point models. In this study, we propose a binary residual multilayer perceptron architecture that mitigates the degradation caused by binarization through the incorporation of normalization layers and residual connections. By leveraging design recommendations from state-of-the-art binary architectures, we aim to create a user-friendly model that can be easily implemented without requiring extensive neural network design expertise. This paper presents the empirical results of our proposed architecture, demonstrating its effectiveness in reducing degradation and improving performance for hardware-constrained devices.