Research on Capacitance Array Method Applied to 12 bits SAR ADC

Capacitor array is very important in the research of SAR ADC (Successive Approximation ADC), its area,matching, noise, power consumption and other performance will determine the conversion performance of the entire ADC. This paper firstly analyzes the value of unit capacitance theoretically, determines the calculation method of unit capacitance value, and then designs five layout structures of unit capacitance, and respectively analyzes the capacitance array layout composed of five kinds of unit capacitors PEX (Parasitic Extraction) and Post- Simulation. After comparing the simulation results, the best structure was selected and further optimized. Finally, based on the SMIC 0.18um CMOS process library, the optimized unit capacitor layout was selected to design a DAC capacitor array layout that can be used for 12 bits SAR ADC. The final capacitor array uses five layers of metal M1-M5, with a length of 220um, a width of 85um, and an area of 18700um
²
.