A 1.8μA, 202 ns Fast Transient Response Output Capacitor-Less LDO with Dual Power Transistors

In this paper, an output capacitor-less low dropout (LDO) regulator with low power consumption and fast transient response is proposed. The dual power transistors are adaptively activated based on the load current. Furthermore, dynamic biasing techniques are utilized to enhance the response speed of the error amplifier. During transient response, the dynamic current is increased by adjusting the resistance of the bias stage after detecting the voltage fluctuation of the amplifier, and the quiescent current recovers to low levels in the steady state. The proposed LDO is implemented in the TSMC 180 nm process, and the simulation results show that the quiescent current of LDO is about 1.8 μA. When the load current varies between 100 μA and 10mA within 500 ns, the overshoot and undershoot voltages are 16mV and 140 mV, respectively, and the recovery time is 202 ns.