A 6-18 GHz Low Group Delay Variation Amplifier With Inductive ESD Protection for Phased-Arrays

This paper presents a ultra-wideband (UWB) amplifier with three cascaded stages to expand operational bandwidth. The shunt inductor at the input provides an electrostatic discharge (ESD) protection path to ground. Implemented in SMIC 40nm CMOS technology, the proposed topology achieves good input impedance matching, flat gain of 17.8–19.9dB and low group delay (GD) variations of 169.0 ± 61.4 ps over 6-18 GHz, simultaneously. The amplifier consumes 188.1 mW totally under a 2.5-V supply and the output 1 dB compression point $(\mathrm{O}\mathrm{P}_{\mathrm{1dB}})$ is $\geq \mathrm{S} \mathrm{dBm}$. After elaborate optimization, the core chip occupies an area of $746\times 587\mu \mathrm{m}^{2}$ excluding test pads and $883\times 724\mu \mathrm{m}^{2}$ with pads included, respectively.