Ultra low leakage planer back gate transistor realized by 12 inch RF PVD InGaZnO4 channel

This paper reported a component controllable (In:Ga:Zn close to 1:1:1) high-purity indium gallium zinc oxide-InGaZnO4(IGZO) film deposition process through optimization of physical vapor deposition(PVD) process parameters(DC power, RF power, process pressure, O2 ratio) on a 12-inch room temperature RF magnetron sputtering platform. By adjusting the composition ratio of In, Ga, and Zn in the film, the carrier mobility, leakage of channel as electrical parameters inside the film can be balanced, a stable internal structure of the film can be obtained. To verify the process and performance of the obtained IGZO film, a component-stable IGZO film prepared by a 12-inch PVD process was used as the channel material to fabricate a planar bottom-gate transistor structure. The on-state current and off-state leakage current under different gate voltage scanning conditions were tested. Experimental data show that the transistor prepared under 4.5% oxygen partial pressure has an ultra-low leakage current of 10E-I2A and a switch current ratio of up to 10E7, the switch current ratio could be further optimized by integration method, such as gate oxide material and annealing in oxygen atmosphere. Such ultra-low leakage current transistors can be used in the field of dynamic random access memory (DRAM), forming a 2T0C structure of storage units with separate write and read paths. This not only allows non-destructive data storage reading but also significantly improves data retention time. Furthermore, because there is no traditional storage unit of capacitor structure, 3D stacking can be achieved, further improving the density of memory units per unit area.