Design of a 9-bit SAR ADC for Quad-channel VCSEL Transmitters

A 9-bit current-mode SAR ADC for automatic power control of quad-channel vertical-cavity surface-emitting laser (VCSEL) optical transmitter is proposed in this paper. The ADC consists of an input selector, a current comparator, a 9-bit current-mode DAC, and clock generation and SAR logic control circuits. The good static characteristics of ADC are mainly implemented by using segmented DAC structure with low mismatch design, and the dynamic characteristics are mainly optimized by lowering the noise of SAR timing sequence. Designed in 130 nm SiGe BiCMOS technology, the ADC occupies an area of 0.05 mm², and consumes dynamic power of 2.9 mW under 1.8 V power supply. The simulation results show that the DNL and INL are within ±0.27 and ±0.26 LSB, respectively. At Nyquist frequency, its SFDR and ENOB are 50.87 dB and 7.29 bits, respectively.